Digital signal processing is the arithmetic processing of read-time signals sampled at regular intervals and digitized. A digital signal processor (DSP) is used for digital signal processing functions such as filtering, mixing, and comparison of signals. In some data processing systems, a DSP may be included with a host processor to deal with any digital signal processing chores. A host processor may include, for example, a microcomputer or a microprocessor.
A DSP typically includes a data arithmetic logic unit (ALU) to perform the mathematical computations. The data ALU may be pipelined to increase performance. A pipelined data ALU comprises a register file of input registers, two execution units, accumulator registers, and pipeline registers. A basic operation in an ALU is a multiply/accumulate (MAC) operation. Circuits which multiply two binary numbers and add or accumulate the result with a third binary number are commonly used in digital signal processing. In signal processing algorithms, such as Fourier transforms, finite impulse response filters (FIR), and infinite impulse response filters (IIR), and the like, it is helpful to have the capability to perform a MAC instruction using hardware.
When a data ALU is performing an iterative MAC instruction for a predetermined number of iterations, such as in an algorithm to implement an FIR filter, a result of the multiplication operation is used as one operand for the accumulate operation. The other operand may be stored in one of the accumulator registers. In a typical data ALU, a result of the accumulate operation as written back to the accumulator registers, or may be written to one of the input registers for each iteration of the MAC instruction. The MAC instruction is performed for a predetermined number of iterations, and each time the result of the accumulate operation is written back to the same accumulator register. The bus between the accumulator and the accumulator register may be relatively long and have a relatively heavy capacitive load. Therefore, writing back to the accumulator register after each iteration may consume a significant amount of power.